For many programming languages there exist free IDEs with refactoring support to allow one to break out chunks of code into new functions/classes with minimal risk of error.
I would like to do similar things to some of my Verilog HDL code breaking an over-sized module into smaller modules, but I don't do enough of this sort of work to justify buying a paid tool. Are there any free (free as in foss would be preferable, but free as in beer would be tolerable) tools that can do this?
One approach that might be worth looking into is using Abstract Syntax Trees (ASTs):
Verilog -> AST -> [refactor AST] -> AST -> Verilog
There are a number of python tools that can do the first & last steps one being pyverilog I recommend that you start by checking that you can do a round trip without any refactoring as the first step.
There are also some python projects that can perform refactoring operations on and AST - RedBaron looks very interesting.
This might be a little more "roll your own" than you prefer but is:
