I'm looking for a piece of software that allows me to input definition of logic gates (and, or, nand, nor, xor, xnor, buffer, not) and their connections, that generates some kind of image where the gates and their connections are automatically laid out, optimally I could somehow use that in Python but that is not a must.

I had a look at the Python package schemdraw, where one can draw gates but the problem is one has to manually layout them. There is the possibility to use the logic parser in schemdraw which automatically generates everything, the problem is however that some things are generated repeatedly. For example in the expression '(a or b) and (b or c)' the b is generated twice.

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I didn't find a program that uses python but netlistsvg can do what I want. One can use the flatten option to generate logic gate level circuit svgs.

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