I need to measure the code coverage of VHDL code. Especially the following metrics are interesting:
- Statement coverage
- Branch coverage
- MC/DC coverage
- Toggle coverage
The only tool (of which I am aware) that is capable of measuring these metrics is ModelSim.
Tool are allowed to run on Linux or Windows.
Question
Are there other tools available, that are capable of measuring these code coverage metrics? Open source solution are interesting too.