Tool to programmatically draw logic circuits into PDF

Question

I'm looking for a (preferably open source) tool to visualize logic circuits such as this

with the following constraints:

• The diagram description should be given programmatically (through java or by providing some kind of textual description which is read from a file; basically I want to be able to call a Java method - which, in turn, may run an external program; I do NOT want a visual tool which requires user input).
• The output should be a PDF.
• If possible, routing should be done automatically.
• It should run on Windows.

While this seems simple enough, I have not found anything satisfactory through extensive research. The tools that came closest were:

• the tikz package of Latex (running Latex is perfectly ok in my context, but for some reason the combination of Java and tikz broke down, see here: https://stackoverflow.com/questions/33298548/pdflatex-run-crashes-when-executed-from-java-on-windows; also, as far as I know, tikz cannot auto-route).
• The blockdiag program (http://blockdiag.com/en/index.html) which is however, if I'm correct, not available for windows (and has no predefined logic gates).

I obviously looked at graphviz, but the problem there is that you cannot tell graphviz where exactly the edges should dock on to the nodes - which is essential if you want to specify inputs and outputs.

There is also this question on SE: https://stackoverflow.com/questions/6422603/circuit-block-diagram-drawing. But without going into detail, all of the suggestions there didn't work for me due to the above mentioned constraints.

I'd have expected this to be a problem solved many times before... (And maybe I just googled poorly.)

Answer 1

I would suggest taking a look at SchemDraw which is a python package which:

• can output results in svg, eps, or pdf,
• allows you to define your own components,
• is cross platform, (including windows),
• is free, gratis & FOSS

You can either create the diagrams directly from python or you can define your own format for storing the information and parse it in.

Answer 2

There's a new project called netlistsvg which may fit the bill; it's still in the early stages but is geared toward logic diagrams, and especially Verilog synthesis.